- main board size – 130x130x20 mm;
- main board power requirements – 12V/2A;
- number of antennas – 16;
- antenna band – L1;
- target interfaces: - I2C; - UART; - SPI; - PPS; - Clock; - GPIO.

The platform consists of powerful hardware, open-source software, optional IP-cores and cloud service. It provides customer with low-cost and fast way to evaluate GNSS Anti-Jamming applications. The software and gateware examples are opened on Amungo Github .

How doest it work?

The RF-signals from sixteen RHCP antennas feed sixteen-channel coherent RF-front-end through low-noise amplifier and RF bandpass filter sections. Sixteen RF BPF outputs then digitized by four four-channel 12-bits analog-to-digital converter (ADC). An FPGA (PL – programmable logic) part of Zynq UltraScale+ System-on-crystal (SoC) receives digital signals and preprocesses it by custom gateware. The preprocessed signal can be used in PL-part or sent to ARM subsystem of SoC for further processing.


The software includes RF-testing software only. It could be used for checking the RF on GNURadio spectrum analyzer.
The limited capture software is also included. The captured samples could be processed by several well-known open-source software GNSS receivers.
There are some IP-cores options for the board: GNSS correlator, space-time filter, matrix inversion and correlation matrix calculation. The info is provided by request.
A Jammed GPS signal output from arbitrary set antenna array could be downloaded for simulations.